About Me
I am a PhD student at Penn State CSE, working with Aasheesh Kolli. I also collaborate with Irina Calciu at VMware Research.
I am interested in the broad areas of systems and computer architecture at datacenter scale.
I was a research intern in Summer 2020 at VMware Research and Summer 2019 at Facebook.
Links:
Curriculum Vitae (Dec 2020)
LinkedIn
Github
News
- 11/20: Paper accepted at ASPLOS’21
- 05/20: Summer Research Internship @ VMware Research Group
- 05/19: Summer Research Internship @ Facebook, Menlo Park (AI HW/SW Codesign Team)
- 02/19: Presented “Rethinking Resource Disaggregation” @ Young Architect Workshop, HPCA’19
- 08/18: Started Grad School @ Penn State CSE
Publications
- [ASPLOS 2021] Rethinking Software Runtimes for Disaggregated Memory
Irina Calciu, M. Talha Imran, Ivan Puddu, Sanidhya Kashyap, Hasan Al Maruf, Onur Mutlu, Aasheesh Kolli - [YArch @ HPCA 2019] Rethinking Resource Disaggregation
M. Talha Imran, Aasheesh Kolli. - [ROBIO 2015] Designing of motions for humanoid goal keeper robots
Idrees Hussain, M. Talha Imran, Abdul Haseeb Ayub, Shams Azeem, Maham Tanveer, Fahad Islam, and Yasar Ayaz
Research
Serverless
I am exploring approaches for scheduling and orchestration of serverless applications from a cloud provider’s perspective. I am currently developing a configurable testbed for meaningful and reproducible serverless experiments on actual clusters comprising cluster managers, open-source serverless frameworks, cloud infrastructure services, distributed load generators and representative real-world serverless applications.
Disaggregated Systems
We are developing a transparent remote memory system without any kernel modifications using Linux user-space page faults to improve portability and adaption of disaggregated systems (collaboration with VMware Research). We also characterized full-scale real-world applications to glean requirements for a transparent fine-grained remote memory system.
HW Accelerator Programmability
We devised an analysis methodology to characterize machine learning hardware accelerators’ software-backend development costs arising from hardware design complexity.
Background
I am a technology enthusiast – intrigued by the utility, organization and implementation of everything with a digital heartbeat.
I have long been interested in bridging the hardware and software worlds. This has led me to pursue Robotics in undergrad, followed by developing low-level JTAG interfaces with embedded boards at Siemens (formerly Mentor Graphics), leading up to my current endeavors with Systems and Computer Architecture. I am intrigued by complexity of datacenter scale systems and how recent computing paradigms (like serverless) and technologies (like RDMA) can improve efficiency and resource utilization.
Food, travel, world affairs, movies and sometimes cars devour my attention occasionally as I attempt to attain some balance with lighter side of life. (more stuff here)
Contact
Email: timran -AT- psu -DOT- edu
Address:
W209 Westgate Building,
University Park, PA, 16802